Release Notes
This document highlights the key features and support included in the BSP-Yocto-FSL-i.MX8X-PD21.1.0 software release for the phyCORE-i.MX8X SOM and development kit.
BSP Operating system |
Linux |
|---|---|
Release Status |
RELEASED |
Release Date |
02-26-2021 |
Repository |
|
Binaries |
New in this Release
SCFW
Added support for the phyCORE-i.MX8X development kit on-top of NXP’s v1.5.1 System Controller Firmware (SCFW) source package.
U-Boot
Added phyCORE-i.MX8X development kit support to the v2020.04 bootloader code base sourced from NXP’s Linux 5.4.24_2.1.0 Release.
Enabled support for loading and applying Linux overlays.
Linux
Added phyCORE-i.MX8X SOM and development kit support to the v5.4.24 kernel code base sourced from NXP’s Linux 5.4.24_2.1.0 Release.
Enable support for building device tree overlays.
Generated overlays for optional hardware/interfaces:
LCD-018-070-KAP: phytec-imx8qxp-lcd018.dtso
VM-011-COL-M12: phytec-imx8qxp-parallel-camera.dtso
PEB-LVDS-01: phytec-imx8qxp-lvds0-peb-lvds-01.dtso (LVDS0 connector), phytec-imx8qxp-lvds1-peb-lvds-01.dtso (LVDS1 connector)
UART2: phytec-imx8qxp-uart2.dtso (cannot be used with CAN)
WIFI: phytec-imx8qxp-wifi.dtso (cannot be used with SD Card interface)
Bluetooth: phytec-imx8qxp-bt.dtso (cannot be used with UART1)
Yocto
Added phyCORE-i.MX8X development kit support to the meta-phytec layer.
Created a layer manifest based on NXP’s Linux 5.4.24_2.1.0 Release for BSP initialization.
Allow device tree overlays to be copied over into generated images
Software Versioning
The BSP-Yocto-FSL-i.MX8X-PD21.1.0 software release is based off of NXP’s L5.4.24_2.1.0 Linux release and shares much of the same components and features.
Linux Kernel |
v5.4.24 |
|
|---|---|---|
U-Boot Bootloader |
v2020.4 |
|
Yocto |
3.0 (Zeus) |
|
SCFW |
1.5.1 |
|
Host OS |
Tested on 64-bit Ubuntu 18.04 LTS |
|
Qt |
5.14.99 beta3 |
|
OpenCL |
1.2 |
|
OpenGL |
ES 3.1 |
|
Gstreamer |
1.14.4 |
PHYTEC Meta Layer
This BSP release supports the phyCORE-i.MX8X development kit and will eventually support configuration options for more SOM variants to be used with the development kit carrier board (PCM-942). Here is a summary of the Yocto Machine Configuration support introduced in the PHYTEC Meta Layer for this release:
Yocto MACHINE |
Default Target Image |
Linux Distro |
Kit Part Number |
Compatible Modules |
U-Boot defconfig |
Linux defconfig |
Device Tree Files |
|---|---|---|---|---|---|---|---|
imx8x-phycore-kit (Default Kit) |
imx-image-multimedia |
KPCM-065-L.A0 |
SOM: PCM-065 Carrier Board: PCM-942 |
pcm065_defconfig |
imx8x_phycore_kit_defconfig |
phytec-imx8qxp-phycore-rdk-emmc.dtb phytec-imx8qxp-bt.dtbo phytec-imx8qxp-lcd-018.dtbo phytec-imx8qxp-lvds0-peb-lvds-01.dtbo phytec-imx8qxp-lvds1-peb-lvds-01.dtbo phytec-imx8qxp-parallel-camera.dtbo phytec-imx8qxp-uart2.dtbo phytec-imx8qxp-wifi.dtbo |
Part Number Summary
Hardware Description |
Part Number |
Configuration Details (LPDDR4 / eMMC / NOR / Ethernet PHY / Security Chip / Temperature) |
PCB Version |
|---|---|---|---|
phyCORE-i.MX8X SOM |
PCM-065-QP28NESI2.A0 |
2GB / 8GB eMMC / OSPI / Yes / Yes / Industrial |
1488.2 |
phyCORE-i.MX8X Carrier Board |
PCM-942.A2 |
1491.1 |
|
PCM-065-QP28NESI2.A0 + PCM-942.A2 (Defualt Kit) |
KPCM-065-L.A0 |
Linux Device Tree Summary
This is a summary of how the device tree source files (.dts) and the various include files (.dtsi) are broken down in the kernel. These files describe the hardware in a hierarchical and modular way to the kernel, connecting device drivers to the interfaces brought out by the carrier board.
Hardware Target |
Device Tree File Descriptions |
Filename |
|---|---|---|
KPCM-065-L.A0 (Default Kit) |
Default Device Tree (includes the SOM .dtsi file below) |
phytec-imx8qxp-phycore-rdk-emmc.dts |
SOM .dtsi- This file adds support for your specific SOM’s population options. |
phytec-imx8qxp-phycore-som.dtsi |
|
Carrier Board .dtsi - This file adds general support for the hardware interfaces featured on the development kit carrier board. |
phytec-imx8qxp-pcm-942.dtsi |
|
LCD-018-070-KAP Module overlay |
phytec-imx8qxp-lcd-018.dtso |
If designing your own custom carrier board around the phyCORE-i.MX8X SOM, you will eventually define a custom device tree for your board that includes the .dtsi file for the SOM, which PHYTEC has provided for you. All the BSP changes custom for your application should eventually be consolidated its own Meta Layer.
Supported Interfaces
The following table outlines the supported interfaces of the default phyCORE-i.MX8X development kit.
The development kit carrier board features a lot of hardware multiplexing to allow users to evaluate as much of the capabilities of the phyCORE-i.MX8X SOM as possible, even when interfaces conflict. Therefore, not all interfaces will be compatible with each other in the development kit implementation and some interfaces will have caveats for use.
Interface |
Detail |
Implemented |
Tested |
Status in Device tree |
Notes |
|---|---|---|---|---|---|
UART |
lpuart0 (UART0) |
Yes |
Yes |
Okay |
Default serial console Connected to FTDI header or UART header depending on switch (S5) |
lpuart1 (UART1) |
Yes |
Yes |
Okay |
Connected to WIFI/BT IC or RS232 header depending on switch (S7) |
|
lpuart2 (UART2) |
Yes |
Yes |
Disable (1) |
Connected to UART header Shares signals with CAN; disabled by default |
|
M40_UART0 |
No |
No |
Disable |
Connected to FTDI or UART headers depending on switch (S5) M40_UART signals currently muxed in SCFW to SCU M4 core rather than User M4 core |
|
I2C |
i2c1 |
Yes |
Yes |
Okay |
Used by: GPIO expander PCM-942 EEPROM RTC USB C PD controller Audio codec |
i2c0_mipi_lvds0 (MIPI_DSI0_I2C0) |
Yes |
Yes |
Okay (3) |
||
i2c0_mipi_lvds1 (MIPI_DSI1_I2C0) |
Yes |
Yes |
Okay (3) |
||
i2c0_parallel (CAM0_I2C) |
Yes |
Yes |
Disabled (1) |
||
Ethernet |
fec1 (ENET0_RGMII on SOM) |
Yes |
Yes |
Okay |
DP83867IRRGZ SOM PHY |
fec2 (ENET1_RGMII on Carrier Board) |
Yes |
Yes |
Okay |
DP83867IRRGZ CB PHY |
|
Display and Touch |
Analog Touch Control 1 |
Yes |
Yes |
Okay (3) |
Capacitive: ETM-FT5x06 (on LCD-018) |
Analog Touch Control 2 |
Yes |
Yes |
Okay (3) |
Capacitive: ETM-FT5x06 (on LCD-018) |
|
PWM Backlight 1 |
Yes |
Yes |
Okay (3) |
pwm_mipi_lvds0 (MIPI_DSI0_GPIO0 on CB) |
|
PWM Backlight 2 |
Yes |
Yes |
Okay (3) |
pwm_mipi_lvds1 (MIPI_DSI0_GPIO1 on CB) |
|
LDB1 (LVDS0) |
Yes |
Yes |
Okay (3) |
LVDS Connector X49 |
|
LDB2 (LVDS1) |
Yes |
Yes |
Okay (3) |
LVDS Connector X48 |
|
eMMC/SD/SDIO |
mmc0 |
Yes |
Yes |
Okay |
eMMC on SOM |
mmc1 |
Yes |
Yes |
Okay |
SD or WIFI/BT depending on Switch S8 |
|
USB |
usbotg1 (USB_OTG1 on Carrier Board) |
Yes |
Yes |
Okay |
Connects to USB Type-A and USB Micro OTG (X52) connectors |
usbotg3 (USB_OTG2 on Carrier Board) |
Yes |
Yes |
Okay |
Connects to USB 3.0 Type-C (Host only) |
|
CAN |
flexcan2 (flexCAN1 on Carrier Board) |
Yes |
Yes |
Okay (2) |
Connects to X100 10 pin header |
SPI |
lpspi2 |
Yes |
Yes |
Okay |
Signals brought out to LVDS connectors |
lpspi3 |
Yes |
Yes |
Okay |
Signals brought out to X94 expansion header |
|
OSPI |
flexspi0 (QSPI0A, QSPI0B on SOM) |
Yes |
Yes |
Okay |
NOR Serial Flash on SOM |
GPIO |
User LED |
Yes |
Yes |
Okay |
|
Memory |
Carrier Board EEPROM |
Yes |
Yes |
Okay |
M24C32 on I2C1 |
SOM EEPROM |
Yes |
Yes |
Okay |
M24C32 on MIPI_CSI0_I2C0 |
|
OSPI NOR Flash |
Yes |
Yes |
Okay |
MT35XU512ABA connected to both QSPI0A and QSPI0B sets of signals |
|
eMMC |
Yes |
Yes |
Okay |
mmc0 on SOM |
|
RTC |
Internal i.MX8X |
Yes |
Yes |
Okay |
Internal to processor |
External RTC |
Yes |
Yes |
Okay |
RV-3028-C7 on I2C1 |
|
Communication |
WIFI |
Yes |
Yes |
Disabled (1) |
Sterling-LWB Module on CB Uses USDHC1 signals (when S8 switched from SD to WIFI) |
Parallel Camera |
Parallel CSI |
Yes |
Yes |
Disabled (1) |
VM-011 at Connector X33 (phyCAM-P connector) |
i2c0_parallel (CAM0_I2C) |
Yes |
Yes |
Disabled (1) |
I2C used by parallel camera |
|
PCIe |
PCIE0 |
Yes |
Yes |
Okay |
PCIe x1 at the X81 connector |
[1] This interface can be enabled using a device tree overlay
[2] CAN is disabled in the UART2 overlay since they share the same signals
[3] phytec-imx8qxp-lcd-018.dtbo loaded by default
Note
For further support please visit PHYTEC’s Support Portal.